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Industrial Engineer

FOSTER Summer Internship

Development and Optimisation of a Silicon Carbide JFET-Based Multiplexer for High-Temperature and High-Radiation Applications

​​Location: Durham, UK

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Modern, reliable energy generation systems capable of continuous operation are a critical element in the UK and wider global energy mix. Low carbon generation including nuclear reactors and geothermal energy, offer a unique set of challenges for sensing and control electronics owing to the high-temperature and high-radiation environments present. Close integration of electronics in the thermally and radioactively ‘hot’ zone offers real term advantages in safety, operation and control, translating into significant, percentage-level increases in total energy generation efficiency. Similar challenges and opportunities exist in next-generation fusion energy systems which, demand highly robust electronic components capable of reliable operation under extreme conditions. Traditional silicon-based electronics degrade quickly in such environments due to thermal instability and radiation damage. In contrast, Silicon Carbide (SiC) Junction Field Effect Transistors (JFETs) offer significant inherent advantages in design layout and material properties, including a wide bandgap, high thermal conductivity, and superior radiation hardness, which make them ideal candidates for operation in extreme conditions. These unique properties have already enabled SiC devices to be integrated in effective detectors for alpha particles and high-energy neutron radiation.

This project focuses on the design, simulation, fabrication, and characterisation of a SiC JFET-based multiplexer, a combinational circuit that generates a single output from those multiple inputs, tailored to operate reliably in high-temperature (>200°C) and high-radiation conditions. The aim is to leverage SiC JFETs to fabricate the foundational parts of a signal processing system with improved reliability and performance for operation in challenging environments directly relevant to fusion.

The initial stage of the project will be to design and simulate a circuit for the multiplexer using SiC JFETs, optimising key parameters such as low on-resistance, high switching speed, thermal stability, and radiation tolerance. This will involve using simulation software such as SPICE to validate performance under extreme thermal and radiation conditions. The next phase will involve fabricating a prototype of the multiplexer using commercially available and custom Nascent Semiconductor SiC JFETs, incorporating thermal management techniques including heat sinks. Finally, the prototype will be characterised by evaluating its electrical and thermal performance in controlled environments, including high-temperature testing (up to 300°C) to assess reliability and identify failure mechanisms.

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For more opportunities and details, please see at UKAEA website.

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Nascent Semiconductor Limited

Carter House, Pelaw Leases Ln, Durham, DH1 1TB  

      info@nascentsemi.com

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